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Lattice Semiconductor PAC-Designer 6.30.1346

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Lattice Semiconductor PAC-Designer 6.30.1346

Lattice Semiconductor PAC-Designer 6.30.1346 | 125 Mb

Powerful productivity – Design Tools for Power and Clock Management

A perfect fit – PAC-Designer is custom tailored for designing with Power Manager and Platform Manager devices.

Get going, get done – PAC-Designer is the complete implementation and verification solution for Power Manager and Platform Manager devices.

Works well with others – Works seamlessly with Lattice Diamond software to let you easily develop innovative mixed signal solutions.

Overview

Lattice sets the industry standard for integrated power, platform and clock management devices, and PAC-Designer design software is the key that unlocks the potential of these solutions for your design.
Move to a More Productive Environment

Fully integrated design and simulation environment for Platform Manager, Power Manager II, and ispClock devices
High level logic design mechanism
Easy-to-use GUI
For Platform Manager, PAC-Designer works in conjunction with ispLEVER to form a complete CPLD/FPGA design environment

Trust, but Verify

Export VHDL or Verilog HDL models to popular 3rd party HDL simulators
Create your power management stimulus graphically
Digital waveform simulation for easy design verification
Simulate power supply rate

Painless Programming

Use Diamond Programmer (included in Lattice Diamond) to download your designs to silicon for Platform Manager
For products other than Platform Manager, PAC-Designer can be used directly to program Platform Manager, Power Manager II and ispClock devices

Home Page - http://www.latticesemi.com/en/Products/DesignSoftwareAndIP/MixedSignalDS/PacDesigner.aspx


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